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PMTS Design for Test Engineer(DFT 可測試性設計)



公司:半導體芯片設計公司
工作地點:北京

Job Summary
This position is responsible for the design solutions for a wide variety of technology nodes and customer applications. Your role is focused on the DFT design and verification of chips to work with the digital design enablement team to help company;s customers adopt the most advanced silicon technologies (12/14/22/28/40/55).

Responsibilities
1. DFT plan definition, implementation, and signoff the DFT design;
2. Finish the DFT design, including: test architecture definition, MBIST insertion, Memory repair, Scan chain insertion & compression, On chip clocking for at-speed test, boundary scan chain insertion, test structure verification;
3. Provide test mode SDC to implementation team and support the SoC test mode timing closure;
4. DFT pattern generation and simulation. Fault coverage analysis and improve;
5. Support DFT pattern bring up on ATE and provide support of failure diagnose and yield improving.

Required Qualifications:
1. At least 12 years experience in DFT, Bachelor's or Master's Degree in Electrical or Computer Engineering required;
2. Familiar with the Mentor or Synopsys tool flow;
3. Confident with Verilog and / or VHDL;
4. Good English/communication skills and willingness to work with a global team;
5. Good learning competency and be able to work in diverse areas in a flexible environment

Preferred Qualifications:
1.Experience in pattern debug on tester is a Plus;
2.Hands on experience with Mentor Tessent Shell based flow is a plus.

簡歷投遞:semi@wanco.com.cn,請寫上應聘的職位。
企業QQ可詳細咨詢:800066950 (找服務);
 
上海萬谷境外就業服務有限公司
Shanghai Wanco Overseas Employment ServiceCo., Ltd
電話:+86-21-62946951/62946952
網站:www.thejanks.com
郵箱:wanco@wanco.com.cn
QQ: 800066950(搜服務)
微信號:wancoshanghai


有興趣者請將中英文簡歷發到以下郵箱:wanco@wanco.com.cn or resume@wanco.com.cn









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